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SN74LVC74ADBRG4

1.65V~3.6V 100MHz D-Type Flip Flop DUAL 74LVC74 14 Pins 10μA 74LVC Series 14-SSOP (0.209, 5.30mm Width)

Manufacturer: Texas Instruments
Origchip NO: 815-SN74LVC74ADBRG4
Package: 14-SSOP (0.209, 5.30mm Width)
Datasheet: PDF
Stock: 638
Description: 1.65V~3.6V 100MHz D-Type Flip Flop DUAL 74LVC74 14 Pins 10μA 74LVC Series 14-SSOP (0.209, 5.30mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 4 days ago)
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	14-SSOP (0.209, 5.30mm Width)
Number of Pins	14
Weight	121.789551mg
Operating Temperature	-40°C~125°C TA
Packaging	Tape & Reel (TR)
Series	74LVC
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	14
ECCN Code	EAR99
Type	D-Type
Terminal Finish	Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory	FF/Latches
Packing Method	TR
Technology	CMOS
Voltage - Supply	1.65V~3.6V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	1.8V
Terminal Pitch	0.65mm
Base Part Number	74LVC74
Function	Set(Preset) and Reset
Output Type	Differential
Polarity	Non-Inverting
Supply Voltage-Max (Vsup)	3.6V
Power Supplies	3.3V
Number of Circuits	2
Load Capacitance	50pF
Output Current	24mA
Clock Frequency	100MHz
Propagation Delay	6 ns
Turn On Delay Time	1 ns
Family	LVC/LCX/Z
Logic Function	AND, D-Type, Flip-Flop
Current - Quiescent (Iq)	10μA
Current - Output High, Low	24mA 24mA
Number of Bits per Element	1
Max Propagation Delay @ V, Max CL	5.2ns @ 3.3V, 50pF
Trigger Type	Positive Edge
Input Capacitance	5pF
Number of Output Lines	1
Clock Edge Trigger Type	Positive Edge
Height	2mm
Length	6.2mm
Width	5.3mm
Thickness	1.95mm
Radiation Hardening	No
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

SN74LVC74ADBRG4 Overview

14-SSOP (0.209, 5.30mm Width)is the packaging method. D flip flop is included in the Tape & Reel (TR)package. There is a Differentialoutput configured with it. It is configured with a trigger that uses a value of Positive Edge. There is an electronic component mounted in the way of Surface Mount. The JK flip flop operates at 1.65V~3.6Vvolts. -40°C~125°C TAis the operating temperature. Logic flip flops of this type are classified as D-Type. The FPGA belongs to the 74LVC series. You should not exceed 100MHzin its output frequency. As a result, it consumes 10μA quiescent current. Currently, there are 14 terminations. The 74LVC74 family contains it. The D flip flop is powered by a voltage of 1.8V . JK flip flop input capacitance is 5pF farads. An electronic device belonging to the family LVC/LCX/Zcan be found here. It is mounted by the way of Surface Mount. The electronic flip flop is designed with pins 14. It has a clock edge trigger type of Positive Edge. The RS flip flops belongs to FF/Latches base part number. It reaches 3.6Vwhen the supply voltage is maximal (Vsup). 2 circuits are used to achieve its superior flexibility. Considering its reliability, this T flip flop is well suited for TR. The D latch operates on 3.3V volts. In addition to its maximum design flexibility, the output current of the T flip flop is 24mA. There are 1 output lines on it.