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SN74LV574APWG4

2V~5.5V 175MHz 8 Bit D-Type Flip Flop DUAL 74LV574 20 Pins 20μA 74LV Series 20-TSSOP (0.173, 4.40mm Width)

Manufacturer: Texas Instruments
Origchip NO: 815-SN74LV574APWG4
Package: 20-TSSOP (0.173, 4.40mm Width)
Datasheet: -
Stock: 498
Description: 2V~5.5V 175MHz 8 Bit D-Type Flip Flop DUAL 74LV574 20 Pins 20μA 74LV Series 20-TSSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 1 week ago)
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	20-TSSOP (0.173, 4.40mm Width)
Number of Pins	20
Weight	76.997305mg
Operating Temperature	-40°C~85°C TA
Packaging	Tube
Series	74LV
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	20
Type	D-Type
Terminal Finish	Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory	FF/Latches
Technology	CMOS
Voltage - Supply	2V~5.5V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	2.5V
Terminal Pitch	0.65mm
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
Base Part Number	74LV574
Function	Standard
Qualification Status	Not Qualified
Output Type	Tri-State, Non-Inverted
Number of Elements	1
Polarity	Non-Inverting
Supply Voltage-Max (Vsup)	5.5V
Power Supplies	3.3V
Supply Voltage-Min (Vsup)	2V
Load Capacitance	50pF
Number of Ports	2
Output Current	16mA
Number of Bits	8
Clock Frequency	175MHz
Propagation Delay	19.6 ns
Turn On Delay Time	4.8 ns
Family	LV/LV-A/LVX/H
Logic Function	D-Type, Flip-Flop
Current - Quiescent (Iq)	20μA
Output Characteristics	3-STATE
Current - Output High, Low	16mA 16mA
Max Propagation Delay @ V, Max CL	10.6ns @ 5V, 50pF
Trigger Type	Positive Edge
Input Capacitance	1.8pF
Power Supply Current-Max (ICC)	0.02mA
Number of Input Lines	8
Count Direction	UNIDIRECTIONAL
Clock Edge Trigger Type	Positive Edge
Translation	N/A
Max Frequency@Nom-Sup	45000000Hz
Height	1.2mm
Length	6.5mm
Width	4.4mm
Thickness	1mm
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

SN74LV574APWG4 Overview

20-TSSOP (0.173, 4.40mm Width)is the way it is packaged. It is included in the package Tube. T flip flop uses Tri-State, Non-Invertedas the output. The trigger it is configured with uses Positive Edge. It is mounted in the way of Surface Mount. The supply voltage is set to 2V~5.5V. A temperature of -40°C~85°C TAis used in the operation. This logic flip flop is classified as type D-Type. JK flip flop belongs to the 74LVseries of FPGAs. It should not exceed 175MHzin its output frequency. In total, there are 1 elements. This process consumes 20μA quiescents. Currently, there are 20 terminations. The 74LV574 family contains it. A voltage of 2.5V is used to power it. A JK flip flop with a 1.8pFfarad input capacitance is used here. An electronic device belonging to the family LV/LV-A/LVX/Hcan be found here. It is mounted by the way of Surface Mount. It is designed with 20 pins. This device's clock edge trigger type is Positive Edge. This device has the base part number FF/Latches. The flip flop is designed with 8bits. As soon as 5.5Vis reached, Vsup reaches its maximum value. Normally, the supply voltage (Vsup) should be above 2V. A total of 3.3V power supplies are needed to run it. This flip flop has a total of 2ports. The 16mA output current allows it to be designed with the greatest amount of flexibility. There are 8 input Lines, which consist of an electronic circuit connected between the ac mains and the rectifier input stage of the switching power supply.