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74LVC74APW-Q100J

1.2V~3.6V 250MHz D-Type Flip Flop DUAL 74LVC74 14 Pins 10μA 74LVC Series 14-TSSOP (0.173, 4.40mm Width)

Manufacturer: Nexperia USA Inc.
Origchip NO: 554-74LVC74APW-Q100J
Package: 14-TSSOP (0.173, 4.40mm Width)
Datasheet: PDF
Stock: 664
Description: 1.2V~3.6V 250MHz D-Type Flip Flop DUAL 74LVC74 14 Pins 10μA 74LVC Series 14-TSSOP (0.173, 4.40mm Width)(Kg)

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Parameters
Terminal Form	GULL WING
Supply Voltage	3.3V
Terminal Pitch	0.65mm
Base Part Number	74LVC74
Function	Set(Preset) and Reset
Output Type	Differential
Number of Elements	2
Polarity	Non-Inverting
Supply Voltage-Max (Vsup)	3.6V
Clock Frequency	250MHz
Propagation Delay	12.4 ns
Quiescent Current	100nA
Family	LVC/LCX/Z
Current - Quiescent (Iq)	10μA
Current - Output High, Low	24mA 24mA
Number of Bits per Element	1
Max Propagation Delay @ V, Max CL	5.2ns @ 3.3V, 50pF
Trigger Type	Positive Edge
Input Capacitance	4pF
Clock Edge Trigger Type	Positive Edge
Length	5mm
Width	4.4mm
Radiation Hardening	No
RoHS Status	ROHS3 Compliant
Factory Lead Time	4 Weeks
Contact Plating	Gold
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	14-TSSOP (0.173, 4.40mm Width)
Number of Pins	14
Operating Temperature	-40°C~125°C TA
Packaging	Tape & Reel (TR)
Series	74LVC
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	14
Type	D-Type
Technology	CMOS
Voltage - Supply	1.2V~3.6V
Terminal Position	DUAL

74LVC74APW-Q100J Overview

It is embeded in 14-TSSOP (0.173, 4.40mm Width) case. D flip flop is embedded in the Tape & Reel (TR) package. As configured, the output uses Differential. It is configured with the trigger Positive Edge. Surface Mountis positioned in the way of this electronic part. A voltage of 1.2V~3.6Vis used as the supply voltage. It is at -40°C~125°C TAdegrees Celsius that the system is operating. D-Typeis the type of this D latch. In terms of FPGAs, it belongs to the 74LVC series. Its output frequency should not exceed 250MHz Hz. The element count is 2 . There is 10μA quiescent consumption. 14terminations have occurred. The 74LVC74 family contains it. The D flip flop is powered by a voltage of 3.3V . This JK flip flop has a 4pFfarad input capacitance. Electronic devices of this type belong to the LVC/LCX/Zfamily. There is an electronic part mounted in the way of Surface Mount. As you can see from the design, it has pins with 14. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. As soon as Vsup reaches 3.6V, the maximum supply voltage is reached. It consumes a total of 100nA quiescent current at any given time.