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74AUP1G74GM,125

0.8V~3.6V 315MHz 1 Bit D-Type Flip Flop QUAD 74AUP1G74 8 Pins 74AUP Series 8-XFQFN Exposed Pad

Manufacturer: Nexperia USA Inc.
Origchip NO: 554-74AUP1G74GM,125
Package: 8-XFQFN Exposed Pad
Datasheet: PDF
Stock: 843
Description: 0.8V~3.6V 315MHz 1 Bit D-Type Flip Flop QUAD 74AUP1G74 8 Pins 74AUP Series 8-XFQFN Exposed Pad(Kg)

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Shipping Cost

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Details

Tags

Parameters
Factory Lead Time	20 Weeks
Contact Plating	Gold
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	8-XFQFN Exposed Pad
Number of Pins	8
Operating Temperature	-40°C~125°C TA
Packaging	Tape & Reel (TR)
Series	74AUP
JESD-609 Code	e4
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	8
Type	D-Type
Technology	CMOS
Voltage - Supply	0.8V~3.6V
Terminal Position	QUAD
Peak Reflow Temperature (Cel)	260
Supply Voltage	1.2V
Terminal Pitch	0.5mm
Time@Peak Reflow Temperature-Max (s)	40
Base Part Number	74AUP1G74
Function	Set(Preset) and Reset
Output Type	Differential
Polarity	Non-Inverting
Supply Voltage-Max (Vsup)	3.6V
Number of Circuits	1
Number of Bits	1
Clock Frequency	315MHz
Propagation Delay	23.3 ns
Quiescent Current	500nA
Turn On Delay Time	2.2 ns
Family	AUP/ULP/V
Logic Function	AND, D-Type
Current - Output High, Low	4mA 4mA
Max Propagation Delay @ V, Max CL	5.8ns @ 3.3V, 30pF
Trigger Type	Positive Edge
Input Capacitance	0.6pF
Clock Edge Trigger Type	Positive Edge
Height Seated (Max)	0.5mm
Radiation Hardening	No
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

74AUP1G74GM,125 Overview

8-XFQFN Exposed Padis the way it is packaged. D flip flop is included in the Tape & Reel (TR)package. T flip flop uses Differentialas the output. There is a trigger configured with Positive Edge. Surface Mountis in the way of this electric part. The supply voltage is set to 0.8V~3.6V. It is operating at a temperature of -40°C~125°C TA. There is D-Type type of electronic flip flop associated with this device. In this case, it is a type of FPGA belonging to the 74AUP series. You should not exceed 315MHzin the output frequency of the device. 8terminations have occurred. The 74AUP1G74family includes it. A voltage of 1.2V provides power to the D latch. This JK flip flop has a 0.6pFfarad input capacitance. In this case, the D flip flop belongs to the AUP/ULP/Vfamily. In this case, the electronic component is mounted in the way of Surface Mount. This board has 8 pins. This device has the clock edge trigger type of Positive Edge. It is designed with a number of bits of 1. As soon as Vsup reaches 3.6V, the maximum supply voltage is reached. The superior flexibility is achieved through the use of 1 circuits. It consumes 500nA current.