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SN74LVC74APWRE4

1.65V~3.6V 100MHz D-Type Flip Flop DUAL 74LVC74 14 Pins 10μA 74LVC Series 14-TSSOP (0.173, 4.40mm Width)

Manufacturer: Texas Instruments
Origchip NO: 815-SN74LVC74APWRE4
Package: 14-TSSOP (0.173, 4.40mm Width)
Datasheet: -
Stock: 793
Description: 1.65V~3.6V 100MHz D-Type Flip Flop DUAL 74LVC74 14 Pins 10μA 74LVC Series 14-TSSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 4 days ago)
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	14-TSSOP (0.173, 4.40mm Width)
Number of Pins	14
Weight	57.209338mg
Operating Temperature	-40°C~125°C TA
Packaging	Tape & Reel (TR)
Series	74LVC
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	14
ECCN Code	EAR99
Type	D-Type
Terminal Finish	Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory	FF/Latch
Packing Method	TR
Technology	CMOS
Voltage - Supply	1.65V~3.6V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	1.8V
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
Base Part Number	74LVC74
Function	Set(Preset) and Reset
Qualification Status	Not Qualified
Output Type	Differential
Polarity	Non-Inverting
Supply Voltage-Max (Vsup)	3.6V
Power Supplies	3.3V
Number of Circuits	2
Load Capacitance	50pF
Output Current	24mA
Clock Frequency	100MHz
Propagation Delay	6 ns
Turn On Delay Time	1 ns
Family	LVC/LCX/Z
Logic Function	AND, D-Type, Flip-Flop
Current - Quiescent (Iq)	10μA
Current - Output High, Low	24mA 24mA
Number of Bits per Element	1
Max Propagation Delay @ V, Max CL	5.2ns @ 3.3V, 50pF
Trigger Type	Positive Edge
Input Capacitance	5pF
Number of Output Lines	1
Clock Edge Trigger Type	Positive Edge
Height	1.2mm
Length	5mm
Width	4.4mm
Thickness	1mm
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

SN74LVC74APWRE4 Overview

The flip flop is packaged in 14-TSSOP (0.173, 4.40mm Width). The package Tape & Reel (TR)contains it. T flip flop uses Differentialas its output configuration. JK flip flop uses Positive Edgeas the trigger. There is an electric part mounted in the way of Surface Mount. A voltage of 1.65V~3.6Vis used as the supply voltage. It is operating at -40°C~125°C TA. This electronic flip flop is of type D-Type. The FPGA belongs to the 74LVC series. It should not exceed 100MHzin its output frequency. There is a consumption of 10μAof quiescent energy. In 14terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. The object belongs to the 74LVC74 family. A voltage of 1.8V is used to power it. A JK flip flop with a 5pFfarad input capacitance is used here. Devices in the LVC/LCX/Zfamily are electronic devices. There is an electronic part that is mounted in the way of Surface Mount. This board has 14 pins. In this device, the clock edge trigger type is Positive Edge. There is a FF/Latchbase part number assigned to the RS flip flops. As soon as Vsup reaches 3.6V, the maximum supply voltage is reached. In order to achieve its superior flexibility, 2 circuits are used. Compared to other similar T flip flops, this device offers reliable performance and is well suited for TR. It runs on 3.3Vvolts of power. With an output current of 24mA, this device offers maximum design flexibility. There are no output lines on the JK flip flop.