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SN74LVC74ADRE4

1.65V~3.6V 100MHz D-Type Flip Flop DUAL 74LVC74 14 Pins 10μA 74LVC Series 14-SOIC (0.154, 3.90mm Width)

Manufacturer: Texas Instruments
Origchip NO: 815-SN74LVC74ADRE4
Package: 14-SOIC (0.154, 3.90mm Width)
Datasheet: -
Stock: 184
Description: 1.65V~3.6V 100MHz D-Type Flip Flop DUAL 74LVC74 14 Pins 10μA 74LVC Series 14-SOIC (0.154, 3.90mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 5 days ago)
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	14-SOIC (0.154, 3.90mm Width)
Number of Pins	14
Weight	129.387224mg
Operating Temperature	-40°C~125°C TA
Packaging	Tape & Reel (TR)
Series	74LVC
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	14
ECCN Code	EAR99
Type	D-Type
Terminal Finish	Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory	FF/Latch
Packing Method	TR
Technology	CMOS
Voltage - Supply	1.65V~3.6V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	1.8V
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
Base Part Number	74LVC74
Function	Set(Preset) and Reset
Qualification Status	Not Qualified
Output Type	Differential
Polarity	Non-Inverting
Supply Voltage-Max (Vsup)	3.6V
Power Supplies	3.3V
Number of Circuits	2
Load Capacitance	50pF
Output Current	24mA
Clock Frequency	100MHz
Propagation Delay	6 ns
Turn On Delay Time	1 ns
Family	LVC/LCX/Z
Logic Function	AND, D-Type, Flip-Flop
Current - Quiescent (Iq)	10μA
Current - Output High, Low	24mA 24mA
Number of Bits per Element	1
Max Propagation Delay @ V, Max CL	5.2ns @ 3.3V, 50pF
Trigger Type	Positive Edge
Input Capacitance	5pF
Number of Output Lines	1
Clock Edge Trigger Type	Positive Edge
Height	1.75mm
Length	8.65mm
Width	3.91mm
Thickness	1.58mm
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

SN74LVC74ADRE4 Overview

The item is packaged in 14-SOIC (0.154, 3.90mm Width)cases. There is an embedded version in the package Tape & Reel (TR). Currently, the output is configured to use Differential. It is configured with a trigger that uses Positive Edge. There is an electronic component mounted in the way of Surface Mount. It operates with a supply voltage of 1.65V~3.6V. It is at -40°C~125°C TAdegrees Celsius that the system is operating. It is an electronic flip flop with the type D-Type. In FPGA terms, D flip flop is a type of 74LVCseries FPGA. Its output frequency should not exceed 100MHz. As a result, it consumes 10μA of quiescent current without being affected by external factors. A total of 14 terminations have been made. This D latch belongs to the family of 74LVC74. The power source is powered by 1.8V. JK flip flop input capacitance is 5pF farads. The electronic device belongs to the LVC/LCX/Zfamily. It is mounted in the way of Surface Mount. With its 14pins, it is designed to work with most electronic flip flops. In this device, the clock edge trigger type is Positive Edge. It is included in FF/Latch. In this case, the maximum supply voltage (Vsup) reaches 3.6V. 2 circuits are used to achieve its superior flexibility. On the basis of its reliable performance, this D flip flop is well suited for use with TR. A total of 3.3V power supplies are needed to run it. In addition to its maximum design flexibility, the output current of the T flip flop is 24mA. There are 1 output lines in this JK flip flop.