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EPM7064STI100-7

0.5mm PMIC 100 Pin 166.7MHz 5V TQFP

Manufacturer: Altera
Origchip NO: 2936-EPM7064STI100-7
Package: TQFP
Datasheet: PDF
Stock: 638
Description: 0.5mm PMIC 100 Pin 166.7MHz 5V TQFP (Kg)

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Details

Tags

Parameters
Mount	Surface Mount
Package / Case	TQFP
Number of Pins	100
Published	1998
JESD-609 Code	e0
Pbfree Code	no
Moisture Sensitivity Level (MSL)	3
Number of Terminations	100
Terminal Finish	Tin/Lead (Sn/Pb)
Max Operating Temperature	85°C
Min Operating Temperature	-40°C
Subcategory	Programmable Logic Devices
Technology	CMOS
Terminal Position	QUAD
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	235
Supply Voltage	5V
Terminal Pitch	0.5mm
Frequency	166.7MHz
Time@Peak Reflow Temperature-Max (s)	30
Pin Count	100
Operating Supply Voltage	5V
Temperature Grade	INDUSTRIAL
Max Supply Voltage	5.5V
Min Supply Voltage	4.5V
Number of I/O	68
Memory Type	EEPROM
Propagation Delay	7.5 ns
Turn On Delay Time	7.5 ns
Frequency (Max)	175.4MHz
Programmable Logic Type	EE PLD
Number of Gates	1250
Number of Programmable I/O	68
Number of Logic Blocks (LABs)	4
Speed Grade	7
Output Function	MACROCELL
Number of Macro Cells	64
JTAG BST	YES
In-System Programmable	YES
Radiation Hardening	No
RoHS Status	RoHS Compliant
Lead Free	Contains Lead

EPM7064STI100-7 Overview

This network has 64macro cells, which are cells that provide radio coverage provided by a high-power cell site (tower, antenna, mast).The product is contained in a TQFP package.There are 68 I/Os on the board.The device is programmed with 100 terminations.As the terminal position of this electrical part is [0], it serves as an important access point for passengers and freight.A voltage of 5V is used as the power supply for this device.It is included in Programmable Logic Devices.It has 100pins programmed.In digital circuits, there are 1250gates, which act as a basic building block.Optimal efficiency requires a supply voltage of [0].It is recommended to store data in [0].It is mounted by Surface Mount.There are 100 pins embedded in the device.A voltage of 5.5V is the maximum supply voltage for this device.The minimal supply voltage is 4.5V.There are 68 programmable I/Os in this system.You can achieve 166.7MHzfrequencies.There should be a temperature above -40°Cat the time of operation.The operating temperature should be lower than 85°C.It consists of 4 logic blocks (LABs).It is recommended that the maximal frequency be lower than 175.4MHz.This kind of FPGA is composed of EE PLD.